Researchers from Tokyo Tech and the National Institute of Information and Communications Technology (NICT) have unveiled a revolutionary D-band CMOS transceiver chipset, which boasts a 56 GHz signal-chain bandwidth and has achieved an unprecedented wireless transmission speed of 640 Gbps through integrated circuits. This innovative chipset holds immense potential for the advancement of next-generation wireless systems.

The demand for faster data speeds and the management of increasing data traffic are driving wireless systems to operate at higher millimeter-wave frequency bands. Current high-band 5G systems already provide impressive speeds up to 10 Gbps within the 24-47 GHz frequency range. However, future mobile communication systems aim to explore even higher frequencies, with the D-band (110 to 170 GHz) anticipated to play a crucial role in the evolution of wireless technology.

High-frequency bands enable faster data transmission but are prone to signal attenuation. Therefore, the development of cost-effective transmitters and receivers that can maintain signal strength is essential for the widespread adoption of next-generation wireless systems. To address this, Professor Kenichi Okada and his team at the Tokyo Institute of Technology, in collaboration with NICT, have developed an innovative transceiver chipset for the D-band using the widely adopted 65nm silicon Complementary Metal-Oxide-Semiconductor (CMOS) process, which allows for cost-effective mass production.

The D-band CMOS transceiver chipset features a substantial 56 GHz signal-chain bandwidth. The transmitter integrated circuit (IC) measures 1.87 mm x 3.30 mm, while the receiver IC measures 1.65 mm x 2.60 mm, showcasing a compact design. The transceiver incorporates essential components such as power amplifiers, low-noise amplifiers, frequency converters (mixers), distributed amplifiers, and frequency multipliers, ensuring efficient signal transmission and reception.

The chipset was installed on a PCB and connected to an external antenna with a 25 dBi gain to evaluate its wireless transmission capabilities. The signal was converted from a transmission line format, typically used on PCBs, to a waveguide format for high-frequency signal transmission in wireless applications, maintaining a conversion loss of 4 dB. The researchers achieved high linearity for multi-level modulation schemes such as 16QAM and 32QAM, addressing a significant obstacle for IC transceivers.

During testing with a modulated signal at a symbol rate of 40 Gbaud and 32QAM modulation, the system achieved a transmission speed of 200 Gbps with high modulation accuracy at a distance of 36 cm, demonstrating a bit error rate of less than 10^-3. Additionally, using 16QAM modulation and a high-gain antenna with 43 dBi gain, the researchers attained speeds of 120 Gbps over a distance of 15 m.

The chipset’s extraordinary performance was further highlighted in a multiple-input, multiple-output (MIMO) configuration, utilizing four transmitter and four receiver modules. In this setup, each antenna could handle its own data stream, allowing for rapid and efficient communication. Utilizing 16QAM modulation, each channel achieved speeds of 160 Gbps, culminating in an impressive total speed of 640 Gbps.

These remarkable speeds exceed current 5G systems by 10 to 100 times, marking a significant leap forward in wireless communication technology. The development of this D-band CMOS transceiver chipset paves the way for future advancements in flexible, high-speed wireless systems, promising a new era of rapid and efficient data transmission.

By Impact Lab